71812 sy/31208 ti im b8-9014 no. a1134-1/6 http://onsemi.com semiconductor components industries, llc, 2013 may, 2013 LV8014T overview LV8014T is a 2ch forward/reverse motor driver ic using d-mos fet for output stage. as mos circuit is used, it supports the pwm input. its features are that the on resistance (0.75 typ) and current dissipation are low. it also provides protection functions such as heat protection circuit and reduced voltage detection and is optimal for the motors that need high-current. functions ? 2ch forward/reverse motor driver ? possible to respond to 3v control voltage and 6v motor voltage device ? low power consumption ? low on resistance 1.2 ? built-in charge pump circuit ? built-in low voltage reset and thermal shutdown circuit ? compact tssop-24 package ? four mode function forward/reverse, brake, stop. specifications absolute maximum ratings at ta = 25 c, sgnd = pgnd = 0v parameter symbol conditions ratings unit supply voltage (for load) vm1, 2 max -0.5 to 7.5 v supply voltage (for control) v cc max -0.5 to 6.0 v output current i o max t 100ms 1.4 a output peak current i o max2 t 10ms 2.5 a input voltage v in max -0.5 to v cc +0.5 v allowable dissipation pd max * mounted on a substrate 800 mw operating temperature topr -20 to +75 c storage temperature tstg -55 to +150 c * : mounted on a substrate : 30 50 1.6mm 3 , glass epoxy board caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. bi-cmos lsi forward/reverse motor driver orderin g numbe r : ena1134a stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV8014T no. a1134-2/6 allowable operating ratings at ta = 25c, sgnd = pgnd = 0v parameter symbol conditions ratings unit supply voltage (vm pin) vm 2.0 to 7.0 v supply voltage (v cc pin) v cc 2.7 to 5.5 v input signal voltage v in 0 to v cc v input signal frequenc f max 100 khz capacitor for charge pump c1, c2, c3 0.001 to 0.1 f electrical characteristics at ta = 25c, v cc = vm1 = vm2 = 5.0v, sgnd = pgnd = 0v, unless especially specified. ratings parameter symbol conditions remarks min typ max unit supply current for load at standby imo en = 0v 1 1.0 a supply current for control at standby ico en = 0v, in1 = in2 = in3 = in4 = 0v 2 1.0 a current drain during operation ic1 en = 5v, vg at no load 3 0.7 1.2 ma h-level input voltage v ih 2.7v v cc 5.5v 0.6 v cc v cc v l-level input voltage v il 2.7v v cc 5.5v 0 0.2 v cc v h-level input current (in1, in2, in3, in4) i ih 4 1.0 a l-level input current (in1, in2, in3, in4) i il 4 -1.0 a pull-down resistance (en1, 2) rup 100 200 400 k ta = 25c, v cc = vm = 5.0v, sgnd = pgnd = 0v ratings parameter symbol conditions remarks min typ max unit output on resistance ron sum of on resistances at top and bottom 5 0.75 1.2 charge pump voltage vg 6 8.5 10.5 v low-voltage detection operation voltage vcs 7 2.15 2.30 2.45 v thermal shutdown operation temperature tth 8 180 c charge pump capacity (ig = 500 a) vgload 9 8 9 v ig current dissipation (fin = 20khz) ig 10 350 a charge pump start time tvg cvg = 0.1 f 11 1.0 ms turn on time tplh 12 0.2 0.4 s output block turn off time tphl 12 0.2 0.4 s remarks 1. it shows current dissipation of vm1, vm2 pin in output off state. 2. it shows current dissipation of v cc pin in stand-by state. (the standard current depends on en pin pull-down resistance.) 3. it shows current dissipation of v cc pin in state of en = 5v (stand-by), including current dissipation of vg pin. 4. for in1, in2, in3 and in4 pins, no pull-down and pull-up resistance is needed. (high impedance pin) 5. it shows sum of upper and lower saturation voltages of out pin. 6. it controls charge-pump oscillation and makes specified voltage. 7. when low voltage is detected, the lower output is turned off. 8. when thermal protection circuit is activated, the lower output is turned off. when the heat temperature is fa llen, it is turned on again. 9. ig (vg pin load current) = 500 a 10. it shows vg pin current dissipation in state of pwm input for in pin. 11. it specifies start-up time from 10 % to 90 % when vg is in non-load state (when setting the capacitor between vg and gnd to 0.1 f and v cc is 5v). 12. it specifies 10 % to 90 % for start-up and 90 % to 10 % for shut-down.
LV8014T no. a1134-3/6 package dimensions unit : mm (typ) 3260a pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 en1 vm2 nc pgnd out4 out3 out2 out1 pgnd nc vm1 vg en2 in1 in2 in3 in4 extra sgnd c2l c2h c1l c1h v cc LV8014T top view -20 0 20 40 60 75 80 100 0 1000 800 600 400 200 480 specified board: 30 50 1.6mm 3 glass epoxy board. allowable power dissipation, pd max - mw ambient temperature, ta - c pd max - ta sanyo : tssop24(225mil) 6.4 0.5 4.4 (0.5) (1.0) 6.5 0.5 0.15 1 12 24 13 0.22 0.08 1.2max
LV8014T no. a1134-4/6 block diagram c2h c2l c1h c1l osc,charge_pump v cc en1 en2 cmos logic level shift vg vm1 out1 out2 p-gnd sgnd 16 17 14 15 13 1 24 23 22 21 20 19 in1 in2 in3 in4 extr a h bridge1 vm2 out3 out4 p-gnd h bridge2 12 11 8 7 4 2 6 5 9 18 low-voltage thermal protection truth table extra en1 (en2) in1 (in3) in2 (in4) out1 (out3) out2 (out4) circuit of charge pump mode h h z z standby h l l h reverse l h h l forward h l l l l on brake l l - - l l off standby h - l h reverse h l - h l forward h l - - l l on brake - : don?t care z : high-impedance * current drain becomes zero in the standby mode. * the output side becomes off, with motor drive stopped, during voltage reduction and thermal protection.
LV8014T no. a1134-5/6 pin functions pin no. pin name function equivalent circuit 15 17 c1l c2l voltage raising capacitor connection pin v cc 14 16 c1h c2h voltage raising capacitor connection pin vg c1h c2h 23 22 21 20 19 in1 in2 in3 in4 extra driver output changeover v cc 1 24 en1 en2 logic enable pin tout output control pin (pull-down resistor incorporated) v cc 200k 8 7 6 5 out1 out2 out3 out4 pgnd driver output pin out ou t vm pgnd 2 11 vm2 vm1 motor power supply 13 v cc logic power supply 12 vg driver drive circuit power supply vg c2h c2l 0.01 f 0.1 f 18 sgnd logic gnd 9 4 pgnd pgnd driver gnd (both terminals to be connected) .
LV8014T no. a1134-6/6 ps sample application circuit c2h c2l c1h c1l v cc en1 en2 in1 in2 sgnd pgnd out2 out1 vm1 vg 0.01 f cpu *1 0.01 f in3 in4 2.7 to 5.5v pgnd out4 out3 vm2 extra m 0.1 f 8.5 to 10.5v 1.0 to 6.5v *1 *1 : connect a kickback absorp tion capacitor directly near ic. coil kickback may cause rise of the voltage of vm line, and the voltage exceeding the maximum rating may be applied mo mentarily, resulting in deterioration or damage of ic. on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.
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